Patrick Schaumont, Kazuo Sakiyama, Yi Fan, David Hwang, Shenglin Yang, Alireza Hodjat, Bo-Cheng Lai, and Ingrid Verbauwhede, “Testing ThumbPod: Softcore Bugs are Hard to Find,” In Proc. IEEE International High Level Design Validation and Test Workshop (HLDVT’03), IEEE, pp.77–82 (Nov., 2003).
Shenglin Yang, Kazuo Sakiyama, and Ingrid Verbauwhede, “A Secure and Efficient Fingerprint Verification System for an Embedded Device,” In Proc. 37th Asilomar Conference on Signals, Systems and Computers, pp.2058–2062 (Nov., 2003).
Patrick Schaumont, Kazuo Sakiyama, Alireza Hodjat, and Ingrid Verbauwhede, “Embedded Software Integration for Coarse-grain Reconfigurable Systems,” In Proc. IEEE 18th International Parallel and Distributed Processing Symposium (IPDPS’04), IEEE, pp.137–142 (Apr., 2004).
Kazuo Sakiyama, Nele Mentens, Lejla Batina, Bart Preneel, and Ingrid Verbauwhede, “Reconfigurable Modular Arithmetic Logic Unit for High-performance Public-key Cryptosystems,” In International Workshop on Applied Reconfigurable Computing (ARC’06), LNCS 3985, Springer-Verlag, pp.347–357 (Mar., 2006).
Kazuo Sakiyama, Bart Preneel, and Ingrid Verbauwhede, “A Fast Dual-Field Modular Arithmetic Logic Unit and Its Hardware Implementation,” In Proc. IEEE International Symposium on Circuits and Systems (ISCAS’06), IEEE, pp.787–790 (May, 2006).
Kazuo Sakiyama, Elke De Mulder, Bart Preneel, and Ingrid Verbauwhede, “A Parallel Processing Hardware Architecture for Elliptic Curve Cryptosystems,” In Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP’06), IEEE, pp.III-904–III-907 (May, 2006).
Kazuo Sakiyama, Yu Sasaki, and Yang Li, “Security of Block Ciphers: From Algorithm Design to Hardware Implementation,” ISBN 978-1-118-66001-0, Wiley (Jul., 2015).
一般社団法人 電気学会・電気システムセキュリティ特別技術委員会スマートグリッドにおける電磁的セキュリティ特別調査専門委員会 編, “IoT時代の電磁波セキュリティ～21世紀の社会インフラを電磁波攻撃から守るには～,” ISBN 978-4-904774-66-3, 科学情報出版株式会社, 分担執筆, 崎山一男, 林優一, “付録 電磁的情報漏えい: B 暗号モジュールを搭載したハードウェアからの情報漏えいの可能性の検討,” (Apr., 2018).
Kazuo Sakiyama et al., Dagstuhl Seminar 19301, “Secure Composition for Hardware Systems,” (21-26, Jul., 2019).
Kazuyuki Kobayashi, Jun Ikegami, Shin’ichiro Matsuo, Kazuo Sakiyama, and Kazuo Ohta, “Evaluation of Hardware Performance for the SHA-3 Candidates Using SASEBO-GII,” Cryptology ePrint Archive, Report 2010/010, 2010.
